A useful building block for a semiconductor integrated circuit (IC) is a transmission gate consisting of a pair of opposite-polarity FET's connected in parallel. Depending on the signals that control the gate, it can be placed in a conductive condition across the full range of the IC power supply voltage. This is highly desirable in many applications.
Referring to FIG. 1, it illustrates how a transmission gate 10 is used in a transition detector as disclosed in U.S. Pat. No. 4,039,858. Gate 10 is composed of an N-channel insulated-gate FET Q0.sub.N and a P-channel insulated-gate FET Q0.sub.P. One source/drain element of FET Q0.sub.N is connected to one source/drain element of FET Q0.sub.P by way of a node 1 at which a gate input signal V.sub.1 is received. The other source/drain element of FET Q0.sub.N is connected to the other source/drain element of FET Q0.sub.P via a node 2 at which a gate output signal V.sub.2 is supplied.
An inverter 11 is connected between the gate electrodes. In response to a signal V.sub.3 provided from a node 3 connected to the Q0.sub.N gate electrode, inverter 11 supplies an inverse signal V.sub.4 to the Q0.sub.P gate electrode.
Signal V.sub.2 is provided to a flip-flop 12 that supplies a signal V.sub.5 representing the flip-flop state. Signal V.sub.2 controls flip-flop 12 when transmission gate 10 is conductive. An EXCLUSIVE NOR gate 13 provides a detection signal V.sub.6 as the EXCLUSIVE NOR of signals V.sub.1 and V.sub.5. The final component of the transition detector is an inverter 14 that generates signal V.sub.3 by inverting signal V.sub.6.
The transition detector operates as follows. Both of FET's Q0.sub.N and Q0.sub.P are normally off so that gate 10 is non-conductive. Signal V.sub.6 is normally at a high voltage. When signal V.sub.1 makes a voltage transition in one direction, the signal transmission delays through the detector enable gate 10 to turn on briefly. This causes a pulse indicative of the transition to appear in signal V.sub.6. A similar pulse occurs in signal V.sub.6 when signal V.sub.1 later makes a transition in the opposite direction.